1. Field of the invention
The present invention relates to a floating point arithmetic operation system. More specifically, the present invention relates to a floating point arithmetic operation system having a function of executing a data converting instruction for converting integer data into floating point data. Furthermore, the present invention relates to a floating point arithmetic operation system capable of executing an arithmetic operation with a reduced number of barrel shiftings. Still more, the present invention relates to a floating point arithmetic operation system capable of executing a fixed point arithmetic operation with an improved throughput.
2. Description of related art
In general, computer systems are configured to handle not only floating point data but also integer data. Therefore, in some cases it is necessary to execute a data converting instruction for converting the integer data into the floating point data.
In conventional computer systems, a floating point arithmetic operation unit has been used exclusively for the floating point arithmetic operation. On the other hand, no hardware for the data conversion has been incorporated in the computer system in order to suppress the overhead in the number of circuit elements, and therefore, the data conversion instruction has been executed by controlling an arithmetic operation unit for integer and shifters by microprograms. Therefore, execution of the data conversion instruction could not have been fastened.
On the other hand, the conventional floating point arithmetic addition/subtraction system can be broadly said to execute four steps, namely, (1) a large-and-small comparison and exponent subtraction, (2) a right barrel shifting of a mantissa part for matching of exponent parts, (3) a mantissa addition/subtraction, and (4) a normalizing barrel shifting of the result of arithmetic operation. In addition, this floating point arithmetic addition/subtraction system can be used for executing a fixed point arithmetic addition/subtraction, by controlling the system in such a manner that the fixed point arithmetic addition/subtraction is executed in the mantissa addition/subtraction step, and data is passed without modification in the other steps.
However, the above mentioned four steps are executed sequentially, and the two barrel shiftings needing a substantial processing time are required. Therefore, the conventional floating point arithmetic addition/subtraction system has a long delayed time in its data processing. In addition, since the floating point arithmetic addition/subtraction system includes only one addition/subtraction circuit, an execution speed of the fixed point arithmetic addition/subtraction is low.